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CXGBE(4)	       FreeBSD Kernel Interfaces Manual		      CXGBE(4)

NAME
     cxgbe -- Chelsio T4 and T5	based 40Gb, 10Gb, and 1Gb Ethernet adapter
     driver

SYNOPSIS
     To	compile	this driver into the kernel, place the following lines in your
     kernel configuration file:

	   device cxgbe

     To	load the driver	as a module at boot time, place	the following lines in
     loader.conf(5):

	   t4fw_cfg_load="YES"
	   t5fw_cfg_load="YES"
	   if_cxgbe_load="YES"

DESCRIPTION
     The cxgbe driver provides support for PCI Express Ethernet	adapters based
     on	the Chelsio Terminator 4 and Terminator	5 ASICs	(T4 and	T5).  The
     driver supports Jumbo Frames, Transmit/Receive checksum offload, TCP seg-
     mentation offload (TSO), Large Receive Offload (LRO), VLAN	tag inser-
     tion/extraction, VLAN checksum offload, VLAN TSO, and Receive Side	Steer-
     ing (RSS).	 For further hardware information and questions	related	to
     hardware requirements, see	http://www.chelsio.com/.

     Note that ports of	T5 cards are named cxl and attach to a t5nex parent
     device (in	contrast to ports named	cxgbe that attach to a t4nex parent
     for a T4 card).  Loader tunables with the hw.cxgbe	prefix apply to	both
     T4	and T5 cards.  The sysctl MIBs are at dev.t5nex	and dev.cxl for	T5
     cards and at dev.t4nex and	dev.cxgbe for T4 cards.

     For more information on configuring this device, see ifconfig(8).

HARDWARE
     The cxgbe driver supports 40Gb, 10Gb and 1Gb Ethernet adapters based on
     the T5 ASIC (ports	will be	named cxl):

     +o	 Chelsio T580-CR
     +o	 Chelsio T580-LP-CR
     +o	 Chelsio T580-LP-SO-CR
     +o	 Chelsio T560-CR
     +o	 Chelsio T540-CR
     +o	 Chelsio T540-LP-CR
     +o	 Chelsio T522-CR
     +o	 Chelsio T520-LL-CR
     +o	 Chelsio T520-CR
     +o	 Chelsio T520-SO
     +o	 Chelsio T520-BT
     +o	 Chelsio T504-BT

     The cxgbe driver supports 10Gb and	1Gb Ethernet adapters based on the T4
     ASIC:

     +o	 Chelsio T420-CR
     +o	 Chelsio T422-CR
     +o	 Chelsio T440-CR
     +o	 Chelsio T420-BCH
     +o	 Chelsio T440-BCH
     +o	 Chelsio T440-CH
     +o	 Chelsio T420-SO
     +o	 Chelsio T420-CX
     +o	 Chelsio T420-BT
     +o	 Chelsio T404-BT

LOADER TUNABLES
     Tunables can be set at the	loader(8) prompt before	booting	the kernel or
     stored in loader.conf(5).

     hw.cxgbe.ntxq10g
	     The number	of tx queues to	use for	a 10Gb or 40Gb port.  The
	     default is	16 or the number of CPU	cores in the system, whichever
	     is	less.

     hw.cxgbe.nrxq10g
	     The number	of rx queues to	use for	a 10Gb or 40Gb port.  The
	     default is	8 or the number	of CPU cores in	the system, whichever
	     is	less.

     hw.cxgbe.ntxq1g
	     The number	of tx queues to	use for	a 1Gb port.  The default is 4
	     or	the number of CPU cores	in the system, whichever is less.

     hw.cxgbe.nrxq1g
	     The number	of rx queues to	use for	a 1Gb port.  The default is 2
	     or	the number of CPU cores	in the system, whichever is less.

     hw.cxgbe.nofldtxq10g
	     The number	of TOE tx queues to use	for a 10Gb or 40Gb port.  The
	     default is	8 or the number	of CPU cores in	the system, whichever
	     is	less.

     hw.cxgbe.nofldrxq10g
	     The number	of TOE rx queues to use	for a 10Gb or 40Gb port.  The
	     default is	2 or the number	of CPU cores in	the system, whichever
	     is	less.

     hw.cxgbe.nofldtxq1g
	     The number	of TOE tx queues to use	for a 1Gb port.	 The default
	     is	2 or the number	of CPU cores in	the system, whichever is less.

     hw.cxgbe.nofldrxq1g
	     The number	of TOE rx queues to use	for a 1Gb port.	 The default
	     is	1.

     hw.cxgbe.num_vis
	     The number	of virtual interfaces (VIs) created for	each port.
	     Each virtual interface creates a separate network interface.  The
	     first virtual interface on	each port is required and represents
	     the primary network interface on the port.	 Additional virtual
	     interfaces	on a port are named vcxgbe (T4)	or vcxl	(T5) and only
	     use a single rx and tx queue.  Additional virtual interfaces use
	     a single pair of queues for rx and	tx as well an additional pair
	     of	queues for TOE rx and tx.  The default is 1.

     hw.cxgbe.holdoff_timer_idx_10G

     hw.cxgbe.holdoff_timer_idx_1G
	     The timer index value to use to delay interrupts.	The holdoff
	     timer list	has the	values 1, 5, 10, 50, 100, and 200 by default
	     (all values are in	microseconds) and the index selects a value
	     from this list.  The default value	is 1 which means the timer
	     value is 5us.  Different interfaces can be	assigned different
	     values at any time	via the	dev.cxgbe.X.holdoff_tmr_idx or
	     dev.cxl.X.holdoff_tmr_idx sysctl.

     hw.cxgbe.holdoff_pktc_idx_10G

     hw.cxgbe.holdoff_pktc_idx_1G
	     The packet-count index value to use to delay interrupts.  The
	     packet-count list has the values 1, 8, 16,	and 32 by default and
	     the index selects a value from this list.	The default value is
	     -1	which means packet counting is disabled	and interrupts are
	     generated based solely on the holdoff timer value.	 Different
	     interfaces	can be assigned	different values via the
	     dev.cxgbe.X.holdoff_pktc_idx or dev.cxl.X.holdoff_pktc_idx
	     sysctl.  This sysctl works	only when the interface	has never been
	     marked up (as done	by ifconfig up).

     hw.cxgbe.qsize_txq
	     The size, in number of entries, of	the descriptor ring used for a
	     tx	queue.	A buf_ring of the same size is also allocated for
	     additional	software queuing.  See ifnet(9).  The default value is
	     1024.  Different interfaces can be	assigned different values via
	     the dev.cxgbe.X.qsize_txq sysctl or dev.cxl.X.qsize_txq sysctl.
	     This sysctl works only when the interface has never been marked
	     up	(as done by ifconfig up).

     hw.cxgbe.qsize_rxq
	     The size, in number of entries, of	the descriptor ring used for
	     an	rx queue.  The default value is	1024.  Different interfaces
	     can be assigned different values via the dev.cxgbe.X.qsize_rxq or
	     dev.cxl.X.qsize_rxq sysctl.  This sysctl works only when the
	     interface has never been marked up	(as done by ifconfig up).

     hw.cxgbe.interrupt_types
	     The interrupt types that the driver is allowed to use.  Bit 0
	     represents	INTx (line interrupts),	bit 1 MSI, bit 2 MSI-X.	 The
	     default is	7 (all allowed).  The driver will select the best pos-
	     sible type	out of the allowed types by itself.

     hw.cxgbe.fw_install
	     0 prohibits the driver from installing a firmware on the card.  1
	     allows the	driver to install a new	firmware if internal driver
	     heuristics	indicate that the new firmware is preferable to	the
	     one already on the	card.  2 instructs the driver to always
	     install the new firmware on the card as long as it	is compatible
	     with the driver and is a different	version	than the one already
	     on	the card.  The default is 1.

     hw.cxgbe.fl_pktshift
	     The number	of bytes of padding inserted before the	beginning of
	     an	Ethernet frame in the receive buffer.  The default value of 2
	     ensures that the Ethernet payload (usually	the IP header) is at a
	     4 byte aligned address.  0-7 are all valid	values.

     hw.cxgbe.fl_pad
	     A non-zero	value ensures that writes from the hardware to a
	     receive buffer are	padded up to the specified boundary.  The
	     default is	-1 which lets the driver pick a	pad boundary.  0 dis-
	     ables trailer padding completely.

     hw.cxgbe.cong_drop
	     Controls the hardware response to congestion.  -1 disables	con-
	     gestion feedback and is not recommended.  0 instructs the hard-
	     ware to backpressure its pipeline on congestion.  This usually
	     results in	the port emitting PAUSE	frames.	 1 instructs the hard-
	     ware to drop frames destined for congested	queues.

     hw.cxgbe.pause_settings
	     PAUSE frame settings.  Bit	0 is rx_pause, bit 1 is	tx_pause.
	     rx_pause =	1 instructs the	hardware to heed incoming PAUSE
	     frames, 0 instructs it to ignore them.  tx_pause =	1 allows the
	     hardware to emit PAUSE frames when	its receive FIFO reaches a
	     high threshold, 0 prohibits the hardware from emitting PAUSE
	     frames.  The default is 3 (both rx_pause and tx_pause = 1).  This
	     tunable establishes the default PAUSE settings for	all ports.
	     Settings can be displayed and controlled on a per-port basis via
	     the dev.cxgbe.X.pause_settings (dev.cxl.X.pause_settings for T5
	     cards) sysctl.

     hw.cxgbe.buffer_packing
	     Allow the hardware	to deliver multiple frames in the same receive
	     buffer opportunistically.	The default is -1 which	lets the
	     driver decide.  0 or 1 explicitly disable or enable this feature.

     hw.cxgbe.allow_mbufs_in_cluster
	     1 allows the driver to lay	down one or more mbufs within the
	     receive buffer opportunistically.	This is	the default.  0	pro-
	     hibits the	driver from doing so.

     hw.cxgbe.largest_rx_cluster

     hw.cxgbe.safest_rx_cluster
	     Sizes of rx clusters.  Each of these must be set to one of	the
	     sizes available (usually 2048, 4096, 9216,	and 16384) and
	     largest_rx_cluster	must be	greater	than or	equal to
	     safest_rx_cluster.	 The defaults are 16384	and 4096 respectively.
	     The driver	will never attempt to allocate a receive buffer	larger
	     than largest_rx_cluster and will fall back	to allocating buffers
	     of	safest_rx_cluster size if an allocation	larger than
	     safest_rx_cluster fails.  Note that largest_rx_cluster merely
	     establishes a ceiling -- the driver is allowed to allocate
	     buffers of	smaller	sizes.

     hw.cxgbe.config_file
	     Select a pre-packaged device configuration	file.  A configuration
	     file contains a recipe for	partitioning and configuring the hard-
	     ware resources on the card.  This tunable is for specialized
	     applications only and should not be used in normal	operation.
	     The configuration profile currently in use	is available in	the
	     dev.t4nex.X.cf and	dev.t4nex.X.cfcsum (dev.t5nex for T5 cards)
	     sysctls.

     hw.cxgbe.linkcaps_allowed

     hw.cxgbe.niccaps_allowed

     hw.cxgbe.toecaps_allowed

     hw.cxgbe.rdmacaps_allowed

     hw.cxgbe.iscsicaps_allowed

     hw.cxgbe.fcoecaps_allowed
	     Disallowing capabilities provides a hint to the driver and
	     firmware to not reserve hardware resources	for that feature.
	     Each of these is a	bit field with a bit for each sub-capability
	     within the	capability.  This tunable is for specialized applica-
	     tions only	and should not be used in normal operation.  The capa-
	     bilities for which	hardware resources have	been reserved are
	     listed in dev.t4nex.X.*caps or dev.t5nex.X.*caps sysctls.

SUPPORT
     For general information and support, go to	the Chelsio support website
     at: http://www.chelsio.com/.

     If	an issue is identified with this driver	with a supported adapter,
     email all the specific information	related	to the issue to
     <support@chelsio.com>.

SEE ALSO
     altq(4), arp(4), cxgb(4), netintro(4), ng_ether(4), ifconfig(8)

HISTORY
     The cxgbe device driver first appeared in FreeBSD 9.0.  Support for T5
     cards first appeared in FreeBSD 9.2 and FreeBSD 10.0.

AUTHORS
     The cxgbe driver was written by Navdeep Parhar <np@FreeBSD.org>.

FreeBSD	11.1		       December	2, 2015			  FreeBSD 11.1

NAME | SYNOPSIS | DESCRIPTION | HARDWARE | LOADER TUNABLES | SUPPORT | SEE ALSO | HISTORY | AUTHORS

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